Boards used in electronic assemblies, such as a printed circuit boards (PCB) or motherboards, for example, may be formed at least in part from ceramic or organic materials. In this context, boards may be referred to as substrates, and may comprise a number of substrate layers. The one or more layers of these substrates may include conductive structures such as patterned interconnect lines, including traces and trenches, for example. Additionally, one or more through holes, which may be referred to as vias or plated through holes, may be formed between layers of the substrate, and may, along with other conductive structures, provide signal paths between electronic components mounted on the substrate, from one side of a substrate to another, or between layers of the substrate, for example. Conductive structures such as these may be formed by imprinting one or more layers of a thermoset and/or thermoplastic polymer based substrate with one or more imprinting tools, such as a microtool. Imprinting tools such as microtools form voids in the layers of the substrate that may be later metalized, in order to complete the formation of conductive structures.
Numerous techniques exist for fabricating microtools that may be used in the formation of conductive structures in substrates, for example. Current state of the art techniques for fabricating microtools comprise building up multiple sublayers using photolithography and plating processes, where the built up sublayers, when completed, form features of a microtool. However, these state of the art methods for forming microtools are complex and time consuming, and, due to tolerance variations in lithography and plating processes, result in difficulties in fabricating microtools with particular geometries or within particular tolerances. A need, therefore, exists for an improved method for forming microtools, which addresses some of these limitations.